A Low-Power 12-lead Arrhythmia Detection SoC Featuring a Reconfigurable CNN and Mixed-Precision Computing

View at publisher
Authors: Yuejun Zhang, Hanyu Shi, Qikang Li, Huihong Zhang, Xinyu Li, Qingxin Xie, Zhenkai Zhou, Peng Wang
Cited by: 0
References: 16

Abstract

Cardiovascular diseases remain a leading global health threat, with arrhythmia being a key early indicator of cardiac abnormalities. The need for continuous cardiac monitoring has driven demand for portable, low-power arrhythmia detection systems. This paper presents a low-power mixed-precision System-on-Chip (SoC) solution designed for arrhythmia detection using 12-lead electrocardiogram (ECG) signals. The proposed approach employs a dynamically reconfigurable convolutional neural network (CNN) architecture with flexible hyperparameters, enhancing hardware adaptability while reducing resource overhead and power consumption. At the computation level, an 8-bit and 16-bit mixed-precision floating-point multiplier is introduced to effectively balance arithmetic accuracy and energy efficiency. Furthermore, clock gating and multi-threshold voltage techniques are employed at the digital back-end to further reduce the power consumption of the chip. Through system-level and module-level optimization, the proposed chip design is of great significance for enabling low-power arrhythmia detection in power-constrained portable medical devices.

Fields of Study & Subjects

ECG Monitoring and Analysis Analog and Mixed-Signal Circuit Design Low-power high-performance VLSI design

Publication details

Journal / source
Asia and South Pacific Design Automation Conference (ASP-DAC)
Pages
703–708
Publication date
19 January 2026
Language
EN