AttestaChain: A Chiplet-aware attestation system based on Blockchain and Zero-Trust Architecture
Abstract
As digital systems become more decentralized and interconnected, the zero-trust principle—"never trust, always verify"—demands continuous, hardware-backed attestation of device integrity. Traditional certification frameworks such as Common Criteria, which validate devices only once before deployment, are no longer sufficient to meet evolving security and compliance challenges. To address this gap, we propose AttestaChain, a novel attestation framework that leverages both cryptographic measurements and the physical characteristics of the Root of Trust (RoT) through Physical IP attestation, ensuring device trustworthiness at any point in its lifecycle. Our solution aligns with international regulations such as the EU Cyber Resilience Act (CRA), the US Executive Order 14028, and China’s Cybersecurity Law, by enabling continuous and verifiable assurance. Beyond extending certification into runtime, AttestaChain allows certification and validation results to be queried on demand, effectively reproducing acceptance tests throughout the product’s lifetime. Designed for flexibility, it supports both SoC architectures and emerging SiP platforms built from chiplets operating in zero-trust environments. Finally, we analyze the runtime complexity of AttestaChain and demonstrate its scalability, particularly in chiplet-based designs, through experimental evaluation. Together, these contributions establish AttestaChain as a robust and forward-compatible solution for trustworthy hardware verification in decentralized and regulated ecosystems.
Fields of Study & Subjects
Security and Verification in Computing
Physical Unclonable Functions (PUFs) and Hardware Security
Advanced Malware Detection Techniques
Publication details
- Journal / source
- 2026 IEEE 23rd Consumer Communications & Networking Conference (CCNC)
- Publisher
- IEEE
- Pages
- 1–8
- Publication date
- 9 January 2026