ML-SECure: Machine Learning-Based Soft Error Correction Pipeline for Multi-Level Cell PCM

Multi-level cell (MLC) phase-change memory (PCM) suffers from soft errors driven by two tightly interacting mechanisms: access-induced read disturbance and time-dependent resistance drift. This work introduces ML-SECURE, a physics-based and ML-guided framework for scalable soft-error prediction and correction. We recalibrate read-disturbance modeling using fine-grained RESET-to-SET (R2S) characterization and formulate both read disturbance and resistance drift in a unified continuous resistance-domain framework. Leveraging these models, we construct joint line-level and page-level datasets and train lightweight multi-output predictors that achieve near-simulation accuracy with millisecond-scale inference latency. Building on these predictors, we design a hierarchical prediction–correction pipeline that performs coarse page-level screening followed by selective line-level localization and mitigation using targeted refresh, ECC strengthening, or state remapping. Across representative workloads, this approach preserves prediction accuracy while reducing refresh operations, ECC overhead, and SLC downgrading significantly compared to uniform correction schemes. These results demonstrate that physics-aware learning and hierarchical mitigation enable practical, workload-scale reliability management for next-generation MLC PCM systems.