A 1.6-to-16 GHz Sub-1-LSB INL pp 7-bit Phase Interpolator Using Constant-Load Unit with Trimming-Free Digital Calibration in 28-nm CMOS
Abstract
This paper presents a 7-bit current-mode phase interpolator (PI) characterized by high linearity, wide operation range, low jitter, and compact area. The proposed PI utilizes constant-load units (CLUs) in synergy with a trimming-free digital calibration, suppressing the nonlinearity from circuit non-idealities and systematic interpolation error in both analog and digital domains. Thanks to the balanced topology of the CLU, the input load variation is 13.5× less than conventional unit and thus achieves a more than 7× input amplitude variation reduction. Fabricated in 28-nm CMOS technology, the prototype achieves a sub-1-LSB peak-to-peak integral nonlinearity (INLpp) over 10:1 relative bandwidth (1.6~16GHz) with an area of 3490 μm2. When operating at 8 GHz, the proposed PI achieves an INLppof 0.79 LSB, a peak-to-peak differential nonlinearity (DNLpp) of 0.95 LSB, and an integrated jitter of 34.55 fsrmsfrom 10 kHz to 1 GHz, while consuming 5.83 mW power.
Fields of Study & Subjects
Radio Frequency Integrated Circuit Design
Advancements in PLL and VCO Technologies
Analog and Mixed-Signal Circuit Design
Publication details
- Journal / source
- 2026 IEEE Custom Integrated Circuits Conference (CICC)
- Publisher
- IEEE
- Pages
- 1–4
- Publication date
- 19 April 2026