Interfacial Properties and Electrical Characteristics of Direct High-k Deposition on Si for CET Scaling

This study investigates the interfacial and electrical properties of high-k gate dielectrics directly deposited on Si substrates. Conventional gate stacks employ a high-k/SiO2interfacial layer (IL); therefore, removing the SiO2-IL is essential for capacitance equivalent thickness (CET) scaling. HfO2, a conventional high-k dielectric, and ZrO2, widely studied with HfO2for ferroelectric applications, were deposited on Si without a SiO2-IL. ZrO2 exhibits a higher dielectric constant than HfO2 due to the formation of highly oriented t/c/o crystalline phases. Interfacial layer was observed for both asdeposited HfO2 and ZrO2 from TEM images, while the thickness of high-k and interfacial layer was not increased for both HfO2 and ZrO2 even after RTA. As a result, ZrO2 achieves a smaller CET than HfO2. These findings suggest that ZrO2 remains a promising candidate for CET scaling.