N-DIPPER: A Distributed Inter-Die Peak Power Management Network for Nand Systems

As NAND flash memory continues to scale, the increasing word-line (WL) stack height and higher program voltage requirements have led to severe peak-current overlaps across dies within a package. Such overlaps cause power-management-IC (PMIC) limit violations, voltage droops, and reliability degradation. Traditional static solutions - such as controller throttling or slope control - cannot fully address these issues because dynamic process, voltage, and temperature (PVT) variations and wear out-induced drift cause both nondeterministic interdie timing mismatches and peak-current magnitude fluctuations, forcing conservative guardbands that limit system parallelism and performance. To overcome these challenges, we propose N DIPPER (NAND Distributed Inter-die Peak PowER Management Network), a cooperative runtime inter-die scheduling framework that dynamically schedules high-current (HC) phases through lightweight in-package (inter-die) fabric. N-DIPPER is based on token-based scheduling across the fabric to serialize scheduling of HC phases while device-aware information is leveraged to avoid utilizing worst-case guardbands. Our evaluation results show that N-DIPPER eliminates PMIC-limit violations (100%) while sustaining 97% of the baseline throughput (without any peak power management) across diverse workloads and die configurations.