An Energy-Efficient Analog Front-End with Programmable-Gain Reference Generator for Bridge Transducer Read-Out IC

This paper presents an energy-efficient analog front-end (AFE) for bridge transducer read-out integrated circuit (ROIC). The proposed design employs a programmable-gain reference generator (PGRG) that supports a wide input range and enables low power operation. In addition, using a second-order $\Delta \Sigma$ modulator ($2^{\text {nd }}$ DSM) architecture that enables high-resolution conversion, the proposed system provides accurate conversion operation. Simulated in a $\mathbf{1 5 0}-\mathbf{n m}$ CMOS process, the AFE achieves a 16.45 -bit resolution and an SNR of 102.4 dB. The AFE operates with a supply voltage of 4 V and a current consumption of $171.7 \mu \mathrm{~A}$ for the analog circuitry, while the digital circuitry consumes $\mathbf{6 6 8. 6} \mathbf{~ p A}$ at $\mathbf{1. 8 ~ V}$.