A 24-Gb/s Single-Ended Duobinary Transmitter with an Auxiliary Pull-Up Driver for SNR Preservation in Memory Interfaces
Abstract
This article presents a single-ended duobinary transmitter (TX) that exploits channel-induced inter-symbol interference (ISI) to generate duobinary signaling while minimizing hardware overhead. Whereas conventional TX focuses on eliminating ISI to preserve signal integrity, the proposed TX leverages ISI by employing a compact auxiliary pull-up driver that intentionally increases the first post-cursor to the same amplitude as the main cursor, thereby forming a duobinary signal. This approach minimizes signal-to-noise ratio (SNR) degradation compared with conventional deemphasis methods. Implemented in a $\mathbf{2 8}-\mathbf{n m}$ CMOS process, TX occupies an active area of $0.0144 \mathrm{~mm}^{2}$ and achieves a data rate of $24 \mathrm{~Gb} / \mathrm{s}$ with an energy efficiency of $0.46 \mathrm{pJ} / \mathrm{bit}$, demonstrating robustness against channel loss and improved design scalability for high-speed memory interfaces.
Fields of Study & Subjects
Low-power high-performance VLSI design
Advancements in PLL and VCO Technologies
Radio Frequency Integrated Circuit Design
Publication details
- Journal / source
- International Conference on Electronics, Information, and Communication (ICEIC)
- Pages
- 1–5
- Publication date
- 18 January 2026
- Language
- EN