An 8-Bit ALU Based in AXI4-Lite for Applications Along with SOCs

The phenomenal upsurge in embedded, portable, and System-on-Chip (SoC) platforms has been a great encouragement in the demand for computational units whose output power is less while the functionality is more phenomenal. The Arithmetic Logic Unit (ALU), as an integral constituent of any digital processor, greatly affects the entire consumption of energy and its performance. This paper presents the IEEE journal-formatted design and simulation of a low-power 8-bit ALU integrated with an AMBA AXI4-Lite slave interface using Verilog HDL. The power-saving architecture supports arithmetic and logical operations that include addition, subtraction, AND, OR, XOR, and shift operations together with power optimization techniques such as clock gating and operand isolation. The AXI4-Lite interface provides standardized, low-overhead communication with external masters, realizing SoC integration. Functional verification and synthesis have been performed on FPGA design tools, and power analysis confirms measurable dynamic power consumption reduction without compromising timing constraints. Scalable and modular, the proposed ALU architecture can be used for energy-efficient embedded and FPGA-based applications.