Development of an ATE based Optimized Test Program for Nand Flash Memory Validation

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Authors: R. Gowrishankar, Nithin Kamalesh M, Sachin G, Senthilkumar Dhamodharan, Kalyana Sundaram Chandran
Cited by: 1
References: 15

Abstract

The Semiconductor technology from micrometer to sub-nanometer nodes has significantly increased device density, complexity and performance expectation making the validation process more intricate and challenging. To address these challenges Automated Test Equipment (ATE) is an important platform that enables fast, repeatable and parallel testing of complicated devices in highly controlled conditions, so that validation can be done accurately and efficiently during testing. Flash memory has emerged as a keystone of non-volatile storage systems, with high density data storing cells that hold multiple bits of data per cell and significantly lower cost per bit than other options. Due to the excessive time required to debug on traditional Bench level validation and mechanisms in-built at default ATE test methods, these are difficult to validate NAND Flash memory. To address these limitations, with the help of C++ programming language an optimized Test Program was developed and achieved a validation time of 13.697 ms compared to 17.509 ms for a single device using the in-built ATE validation method, thereby the optimized test program improving validation speed and efficiency of time. The optimized NAND Flash memory method enhances testing at production levels on the ATE, which incorporates timing diagram outputs and shmoo analysis to evaluate device operations across all operating conditions.

Fields of Study & Subjects

VLSI and Analog Circuit Testing Engineering and Test Systems Advanced Data Storage Technologies

Publication details

Journal / source
2026 6th International Conference on Pervasive Computing and Social Networking (ICPCSN)
Publisher
IEEE
Pages
1414–1419
Publication date
6 May 2026