Design of Mac Unit for Deep Learning Application using Urdhava Tiryakbhayam Multiplier

Numerous arithmetic operations particularly multiplication and accumulation, are necessary for deep learning applications. Multiply-Accumulate (MAC) units which are frequently used for these operations are crucial in determining the speed and effectiveness of neural network calculations. When processing more datasets, traditional multiplier systems frequently experience higher power consumption and latency. The Urdhva Tiryakbhyam multiplier technique, that is one of the Vedic mathematics, is used in this design to work as a MAC unit. The suggested architecture seeks to increase hardware efficiency and computing speed. Compared to traditional multipliers, the multiplier reduces propagation delay by generating partial products in parallel form. The MAC unit supports deep learning operations like convolution and matrix multiplication by integrating the Vedic multiplier with an effective accumulator. Digital logic is used to implement the design with efficient performance in area, power and delay. The findings show that the suggested design is appropriate for deep learning accelerators since it offers quicker computation with optimal hardware consumption.