Quantum-Inspired FPGA Design of an Energy–Efficient Hamming (7,4) Encoder–Decoder using Hybrid Peres–Toffoli and Double-Feynman Gates for Fault-Tolerant Communication

Effective and low-power error-control coding techniques are necessary for reliable data transmission in faulttolerant communication systems. In this research, a unique hybrid of Peres-Toffoli and Double-Feynman reversible logic gates is used to create an energy-efficient, quantum-inspired Hamming$(7,4)$encoder-decoder design. The suggested design is implemented on an Artix-7 FPGA after being designed in Verilog HDL and synthesized with the Xilinx Vivado Design Suite. Performance and resource usage are significantly improved when compared to traditional hybrid reversible architectures like Toffoli, Peres, Double Feynman, and HNG gates. The suggested encoder reduces static and dynamic powers by 6.2 % and 34.4 % respectively and achieves a total power consumption of 2.376 W, which is 67.8 % less than the highest conventional design. By using just two LUTs, hardware complexity is reduced, resulting in a nearly 60 % reduction in logic usage. Comparably, the decoder uses only four LUTs and almost half the hardware resources of earlier systems, exhibiting a 23.7 % total power reduction and a 13.7 % dynamic power reduction. Overall, the hybrid Peres-Toffoli and DoubleFeynman architecture ensures precise and quick error correction by offering an optimal area-power trade-off, fewer garbage outputs, and minimal logic depth. These findings prove that the suggested design is an extremely area-optimised and power-efficient solution appropriate for low-power VLSI systems for developing quantum computing platforms.