Machine Learning-Based Power Estimation of Cmos Inverter Using Ltspice Simulation Data

This paper presents a comprehensive process for power estimation of a CMOS inverter through LTspice simulation data with machine learning methods. A total simulation runs were performed by varying the supply voltage$(0.8 \mathrm{V}-1.2 \mathrm{V})$, load capacitance ($10 \text{pF}, 50 \text{pF}, 100 \text{pF}$) and operating frequency ($25 \text{Hz}-10 \text{kHz}$). From each run, average, dynamic, and static power components were obtained and compiled into a summary dataset. A Random Forest regression model was fitted to the summary dataset to forecast average power based on design and operating parameters. The trained model was also used to estimate the switching activity factor ($\alpha$) with the formula$\alpha{ = }$(Pavg,ML - Pstatic)/ CV\^{}2f. The average$\alpha$values were then used to analytically recompute the average power as Pavg = Pstatic$+\alpha \text{CV}^{\wedge} 2 \mathrm{f}$, showing close agreement with the simulation data. This hybrid approach, based on SPICE simulations and ma- chine learning, is capable of accurately capturing the nonlinear dependencies within the CMOS power characteristics, and gives us an accurate, scalable methodology to estimate power that is applicable to larger logic gates, as well as low-power designs, which is important for the development and verification of energy-efficient semiconductors. The novelty of this work is the combination of LTspice-derived waveform data and a Random Forest model that can quickly and accurately estimate dynamic power.