High-Speed Area-Efficient Adder Design with SET-MOS Technology

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Authors: Jingping Zhang, Chunhong Chen
Cited by: 1
References: 15

Fields of Study & Subjects

Low-power high-performance VLSI design Analog and Mixed-Signal Circuit Design Advancements in Semiconductor Devices and Circuit Design

Publication details

Journal / source
2026 IEEE International Symposium on Circuits and Systems (ISCAS)
Publisher
IEEE
Pages
1067–1071
Publication date
24 May 2026