Enhanced Hybrid Temporal Computing Using Deterministic Summations for Ultra-Low-Power Accelerators

This paper presents an accuracy-enhanced Hybrid Temporal Computing (E-HTC) framework for ultra-low-power hardware accelerators using deterministic additions. The framework is inspired by the recently proposed HTC architecture, which leverages pulse-rate and temporal data encoding to reduce switching activity and energy consumption but suffers accuracy loss due to its use of a multiplexer (MUX) for scaled addition. To address this limitation, we propose two bitstream addition schemes: (1) an Exact Multiple-input Binary Accumulator (EMBA), which performs precise binary accumulation over multiple-input bitstreams, and (2) a Deterministic Threshold-based Scaled Adder (DTSA), which employs threshold-based logic for scaled addition. These adders are integrated into a multiplier–accumulator (MAC) unit supporting both unipolar and bipolar encodings. To validate the framework, we implement two hardware accelerators: a Finite Impulse Response (FIR) filter and an 8-point Discrete Cosine Transform (DCT)/iDCT engine. Experimental results on a $4 \times 4$ MAC show that, in unipolar mode, E-HTC matches the RMSE of state-of-the-art Counter-Based Stochastic Computing (CBSC) MAC, improves accuracy by $94\%$ over MUX-based HTC, and reduces power and area by up to $23 \%$ and $7 \%$ compared to MUX-based HTC and by over $64 \%$ and $74 \%$ compared to CBSC. In bipolar mode, the EHTC MAC achieves an RMSE of ${2. 0 9 \%}$—an ${8 3 \%}$ improvement over bipolar MUX-based HTC and approaches bipolar CBSC’s RMSE of $1.40 \%$ with area and power savings of up to $28 \%$ and $43\%$ relative to MUX-based HTC and around $76\%$ each relative to CBSC. In FIR filter experiments, both E-HTC variants achieve PSNR gains of ${3}-{5} {~ d B}~({3 0}-{4 5} {\%}$ RMSE reduction) over MUX-based HTC, while delivering up to $13 \%$ power and $3\%$ area savings. Compared to CBSC, E-HTC reduces area by nearly $64 \%$ and power by $62 \%$. For DCT/iDCT, E-HTC boosts PSNR by $10-13 \mathrm{~dB}$ ($70-75 \%$ RMSE reduction) while providing substantial area and power savings over both MUX- and CBSC-based designs.