A 0.05mm 2 1.19-to-7.34mW SQIsign-1D Isogeny-Based Post-Quantum Signature Verification Accelerator for IoT
Abstract
This work presents a$0.05 \text{mm}^{2}$and 1.19 -to- 7.34 mW hardware accelerator for the isogeny-based NIST post-quantum digital signature candidate SQIsign. Our Montgomery multiplier design enables$2 \times$speedup and energy savings, and efficient memory organization provides 31% area savings. We demonstrate SQIsign-1D uncompressed signature verification in a small form factor for IoT applications with order of magnitude improvement in performance and energy-efficiency compared to assembly-optimized software.
Fields of Study & Subjects
Advancements in PLL and VCO Technologies
Radiation Effects in Electronics
Cryptographic Implementations and Security
Publication details
- Journal / source
- 2026 IEEE International Solid-State Circuits Conference (ISSCC)
- Publisher
- IEEE
- Pages
- 432–434
- Publication date
- 15 February 2026