SpikeRAM: A 48.1pW/Synapse/Bit Event-Driven Spiking Compute-Near/In-Memory Processor with Neuromorphic Sensor Enabling Life-Long On-Chip Learning
Abstract
SpikeRAM is a high efficiency ($48.1 \text{pW} /$Synapse/Bit) memory-centric neuromorphic system with perception, computing and on-chip learning, achieving 464M synapses and 8.28 mW power in real-time processing, while realizing few-shot learning for event-based signature verification. The EVS-sCNN core enables asynchronous sensing and feature extraction. The sFC-OCL core enables event-driven inference and learning with the e-OTBP algorithm. Gray-code weights and ternary gradients reduce memory write times by over 86%.
Fields of Study & Subjects
Advanced Memory and Neural Computing
Low-power high-performance VLSI design
Parallel Computing and Optimization Techniques
Publication details
- Journal / source
- Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
- Pages
- 314–316
- Publication date
- 15 February 2026
- Language
- EN