A Binary-Weighted Switched-Capacitor Gate Driver IC for Overcoming Trade-Offs Between Driving Loss and Delay Time with Gate-Current Feedback Achieving 85% Driving Loss Reduction
Abstract
A binary-weighted switched-capacitor gate driver IC achieving up to 85% reduction in driving loss ($\mathrm{E}_{\text{drv }}$) is presented. Four binary-weighted flying capacitors enable nine-level gate-voltage segmentation, enhancing charge supply capability. Adaptive state interval time control based on gate-current feedback mitigates the trade-off between the switching time of the gate-voltage ($t_{\text{sw}}$) and$\mathrm{E}_{\text{drv}}$, reducing tsw by 19% at equal$\mathrm{E}_{\text{drv}}$, and reducing$\mathrm{E}_{\text{drv}}$by 9% at equal$\mathrm{t}_{\text{sw}}$.
Fields of Study & Subjects
Advanced DC-DC Converters
Multilevel Inverters and Converters
Analog and Mixed-Signal Circuit Design
Publication details
- Journal / source
- Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
- Pages
- 1–3
- Publication date
- 15 February 2026
- Language
- EN