8.8 A 0.292pJ/b 56Gb/s/wire Capacitively Driven Simultaneous Bidirectional Transceiver with PVT/Mismatch Tracking for XSR and D2D Interfaces in 28nm CMOS
Abstract
A low-power$(0.292 \text{pJ} / \mathrm{b})$, high-bandwidth$(56 ~\text{Gb} / \mathrm{s} /$wire) single-ended capacitively driven simultaneous bi-directional (CD-SBD) TRX with PVT tolerance is proposed. Capacitive driving reduces power and self-interference in SBD. AC/DC replica and PVT/mismatch tracking provides PVT robustness without extra hardware. Per-lane CDR and a quadrature generator with QEC/DCC, secure clock margin. The TRX sustains$0.93-1.2 ~\mathrm{V}$supply, and$0-80^{\circ} \mathrm{C}$temperature variation.
Fields of Study & Subjects
Advancements in PLL and VCO Technologies
3D IC and TSV technologies
Radio Frequency Integrated Circuit Design
Publication details
- Journal / source
- 2026 IEEE International Solid-State Circuits Conference (ISSCC)
- Publisher
- IEEE
- Pages
- 148–150
- Publication date
- 15 February 2026
- Language
- 영어