25.2 A 28nm 0.48mJ/boot Torus FHE Processor for Arbitrary Computation on Encrypted Data
Abstract
This work presents a$3.24 ~\text{mm}^{2}$torus fully homomorphic encryption (FHE) processor fabricated in 28 nm CMOS, featuring: 1) a security-preserving low-bit-width torus quantization with keys hints reducing latency by$62 \%, 2$) a divide-and-conquer innovative polynomial multiplication engine improving energy efficiency by 29%, and 3) a conflict-free atomic swizzling with full-depth pipelining reducing memory size by 96%. It delivers$196 \times$higher energy efficiency in bootstrapping compared to a CPU.
Fields of Study & Subjects
Cryptographic Implementations and Security
Cryptography and Residue Arithmetic
Chaos-based Image/Signal Encryption
Publication details
- Journal / source
- 2026 IEEE International Solid-State Circuits Conference (ISSCC)
- Publisher
- IEEE
- Pages
- 426–428
- Publication date
- 15 February 2026