11.8 A 14b 20GS/s RF-Sampling DAC Achieving 70.4dBc IMD3 Up to 8.9GHz

2026 IEEE International Solid-State Circuits Conference (ISSCC) 2026

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Authors: Hao Luo, Zhijun Long, Wentao Zhu, Haowei Lu, Yushen Fu, Mingqian Lei, Cheng Wang, Xiaoge Zhu, Yumei Diao, Haipeng Zhu, Jiajun Zhong, Li Tian
+3 more Yi Yang, Xinli Geng, Keqing Ouyang
DOI: 10.1109/isscc49663.2026.11409046
Cited by: 1
References: 9

Abstract

This work presents a$14 \mathrm{b} 20 \text{GS} / \mathrm{s}$RF-sampling DAC. By introducing a switch driver with process-and-temperature-adaptive (PT-adaptive) level shifting and enhanced low-crosspoint control, the DAC demonstrates an IMD3 of 70.8 dBc at 7.2 GHz and$16 \text{Gs} / \mathrm{s}$, and a maximum output power of 7 dBm. An algorithm, named ISI-minimizing dynamic element matching (ISIM-DEM), is proposed to mitigate output distortion induced by inter-symbol interference (ISI) effect at$20 \text{GS} / \mathrm{s}$sampling, achieving 73 dBc IMD3 at 8.5 GHz.

Fields of Study & Subjects

Radio Frequency Integrated Circuit Design Microwave and Dielectric Measurement Techniques Advanced Power Amplifier Design

Publication details

Journal / source
2026 IEEE International Solid-State Circuits Conference (ISSCC)
Publisher
IEEE
Pages
204–206
Publication date
15 February 2026