33.2 An Infinite-Loop CMOS-Compatible Isolator Enabled True VSWR-Resilient Power Amplifier for 6G FR3 in Massive MIMO and Phased-Array Systems

Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference 2026

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Authors: Mohsen Ghorbanpoor, Mohamed Eleraky, Konstantinos Manetakis, Pascal Nussbaum, Hua Wang
DOI: 10.1109/isscc49663.2026.11409051
Cited by: 0
References: 10

Abstract

This work presents a balanced power amplifier (PA) featuring a time-varying output matching network designed to suppress unwanted reflections and couplings in phased array and MIMO systems. By leveraging lossy non-reciprocal phase shifters in an indirect infinite loop, the architecture minimizes transmission loss while maintaining perfect isolation. Fabricated using a 22 nm CMOS SOI process, the proposed PA achieves IP1dB variation within \pm 0.43 dB across 3:1/2:1 VSWR contours and bandwidth (BW).

Fields of Study & Subjects

Advanced Power Amplifier Design Radio Frequency Integrated Circuit Design Analog and Mixed-Signal Circuit Design

Publication details

Journal / source
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
Pages
564–566
Publication date
15 February 2026
Language
EN