30.5 A 16nm 72kb 120.5TFLOPS/W Versatile-Format Dual-Representation Gain-Cell CIM Macro for General Purpose AI Tasks

2026 IEEE International Solid-State Circuits Conference (ISSCC) 2026

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Authors: Jen-Chun Tien, Win-San Khwa, Le-Jung Hsieh, Tsung-Han Lou, Jyun-Cheng Bai, Yu-Sheng Kao, Ting-Hao Hsu, Mai Tseng, Hung-Hsi Hsu, Yao-Kai Yeh, De-Qi You, Ashwin Sanjay Lele
+9 more Brian Crafton, Bo Zhang, Ping-Sheng Wu, Ya-Tang Yang, Chung‐Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
DOI: 10.1109/isscc49663.2026.11409052
Cited by: 1
References: 22

Abstract

Diverse AI workloads require flexible data representations and numerical formats. In this work, we present a reconfigurable 2's-complement and sign-magnitude scheme integrated within a versatile-format CIM macro supporting MX, LNS, FP, and INT for MAC operations. Implemented in a 16 nm 72 kb gain-cell array, the macro achieves record energy efficiency (120.5TFLOPS/W) and throughput density$(3.18 \text{TOPS} / \text{mm} 2)$in MXINT8 mode.

Fields of Study & Subjects

Radio Frequency Integrated Circuit Design Advanced Memory and Neural Computing Photonic and Optical Devices

Publication details

Journal / source
2026 IEEE International Solid-State Circuits Conference (ISSCC)
Publisher
IEEE
Pages
520–522
Publication date
15 February 2026