17.3 ARIES and REGULUS: A Unified and Scalable hardware–software co-designed NPU SoC Family for On-Device and On-Premises Multimodal Inference

We present a scalable NPU architecture, proven in two SoCs (ARIES and REGULUS), designed to efficiently execute diverse AI workloads from vision to large language models. The architecture scales seamlessly across cores, clusters, and chips via a unified programming model. Our holistic hardware-software co-design preserves model accuracy through a bound- and distribution-aware mixed-precision quantization scheme, while efficiently handling complex activation functions via a non-uniform piecewise-linear method. Silicon measurements demonstrate near-linear performance scaling and high power and bandwidth efficiency on both vision and language workloads.