37.6 A 0.092pJ/b and 7.7fJ/b/dB Cross-Self-Referenced Slope-Sampling Receiver with Long-Tail ISI Robustness for Next-Generation Low-Power Memory Interfaces
Abstract
We present a cross-self-referenced slope-sampling RX that is robust against long-tail ISI, without equalization, for next-generation low-power memory interfaces. By determining received data based on the slope of the input signal, the proposed architecture enhances resilience to accumulated post-cursor ISI. Fabricated in a 65-nm CMOS process, the prototype achieves a 0.092pJ/b energy efficiency at 12.5Gb/s and a 7.7fJ/b/dB FoM at 12Gb/s, while occupying only 0.001 mm2.
Fields of Study & Subjects
Radio Frequency Integrated Circuit Design
Analog and Mixed-Signal Circuit Design
Advancements in PLL and VCO Technologies
Publication details
- Journal / source
- 2026 IEEE International Solid-State Circuits Conference (ISSCC)
- Publisher
- IEEE
- Pages
- 634–636
- Publication date
- 15 February 2026