17.4 Maia: A Reticle-Scale AI Accelerator

Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference 2026

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Authors: Shuotao Xu, G. Mandal, S. Jahagirdar, S. Tripathy, P. Parthasarathy, S. Srinivasan, A. Levin
DOI: 10.1109/isscc49663.2026.11409201
Cited by: 0

Abstract

In Paper 17.4, the architecture and implementation of Microsoft's MAIA AI silicon, a reticle-scale 750W AI SoC, is presented. Innovation across power delivery, thermal management, physical design, validation, and packaging is detailed, resulting in a scalable approach to high-performance AI acceleration.

Fields of Study & Subjects

Parallel Computing and Optimization Techniques Embedded Systems Design Techniques VLSI and FPGA Design Techniques

Publication details

Journal / source
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
Pages
304–305
Publication date
15 February 2026
Language
EN