A 3nm 0.167fJ/b 5.27Mb/mm 2 Configurable TCAM with Macro-Wise Pipelined Search Methods for Automotive Applications

Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference 2026

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Authors: Shunya Nagata, Yohei Sawada, Kenichiro Takiguchi, Masao Morimoto, Shinji Tanaka, Naoya Fujita, Tomohiro Miura, Daisuke Nakamura, Takashi Ito
DOI: 10.1109/isscc49663.2026.11409338
Cited by: 0
References: 4

Abstract

This paper presents a TCAM design that includes a bank-less small-grain TCAM-macro compiler, a configurable soft-macro generator, selective macro-wise pipelined search techniques, and a split data-bus architecture for ECC. The proposed TCAM achieves 0.167fJ/b search energy and 5.27Mb/mm2density with a 512-entry and 256b search key configuration in a 3nm bulk Fin-FET process technology for automotive network applications.

Fields of Study & Subjects

Network Packet Processing and Optimization Interconnection Networks and Systems VLSI and FPGA Design Techniques

Publication details

Journal / source
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
Pages
262–264
Publication date
15 February 2026
Language
EN