A Capacitor Design Methodology for Unfolder Inverters to Minimize Leakage Current in Single-Phase Non-Isolated PV Systems

Unfolder inverters pose unique advantages in trans formerless photovoltaic (PV) systems, such as increased efficiency and power density. One significant advantage, beneficial for compact PV systems, is the reduction of the intermediate DC-link capacitance. In this paper, the relationship between intermediate bus capacitance and common-mode leakage current is investigated, and it is shown that the magnitude of leakage current is inversely proportional to the bus capacitance. Although a non-stiff DC-link allows for capacitor reduction, excessive minimization can result in high leakage current, even with bipolar PWM in the unfolder stage. To address this, a novel algorithm is proposed to analytically estimate the leakage current. Based on this estimation, a capacitor design methodology is developed to optimally select the intermediate bus capacitance, ensuring that it remains as small as possible while maintaining leakage current within acceptable limits. It is further demonstrated that, with appropriate capacitor optimization, additional common mode filters are not required for leakage current reduction and may be eliminated from the system. The proposed method is validated through simulation and hardware experiments on a 1 kW unfolder prototype, demonstrating leakage current as low as 10.3 mAin off-grid operation, as well as effective control within standard limits under grid-connected conditions for varying parasitic capacitance.