Hierarchical Memristor-Based IMPLY Comparator Architecture for In-Memory Computing
Abstract
To address the inherent bottlenecks of comparison latency and energy efficiency caused by the separation of computation and storage in the von Neumann architecture, this study proposes a memristor-based modular hierarchical tree comparator that employs implication (IMPLY) logic. The proposed architecture performs parallel bit-wise comparisons, generating ternary outputs (">", "
Fields of Study & Subjects
Advanced Memory and Neural Computing
Low-power high-performance VLSI design
DNA and Biological Computing
Publication details
- Journal / source
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems
- Volume
- 16
- Issue
- 2
- Pages
- 302–311
- Publication date
- 3 February 2026