High-Speed MAGIC-Based Exact and Approximate Adders for In-Memory Computing
Abstract
As data-intensive applications such as Machine Learning (ML) continue to drive escalating computational demands, traditional approaches face increasing difficulty in meeting performance requirements. Memory-centric computing has emerged as a promising paradigm by enabling computations to be performed directly within memory, thereby reducing the latency and energy overhead associated with data movement. Approximate computing (AxC) offers another complementary approach, improving performance metrics such as speed at the cost of reduced accuracy. In this work, the stateful Memristor Aided loGIC (MAGIC) is employed to integrate these paradigms for the design of exact and approximate full adders, forming the basis for modern computing tasks. The proposed exact MAGIC-based Full Adder (MFA), implemented on a parallel architecture, achieves a 27.7% to 65.7% reduction in latency compared to State-of-the-Art (SoA) exact MAGIC adder, with a minimal 4 × 5 crossbar footprint. Additionally, a novel approximation methodology is proposed, yielding three MAGIC-based Approximate Full Adder (MAFA) designs, which are integrated with the MFA to construct Ripple Carry Adders (RCAs) with varying degrees of approximation. Compared to the best existing exact MAGIC adder the MAFA designs improve latency by 37.3% to 68.6%, require 19.6% to 49.6% less area, and reduce the energy consumption by 20% to 54.4%. We evaluated the proposed MAFA designs across four image-processing applications. The results demonstrate that they achieve acceptable output quality comparable to the best SoA approximate memristive adders, while reducing latency by up to 78% and improving energy efficiency by up to 35×. Evaluation on CNN models, including ResNet, DenseNet, and VGG families, shows that MAFA-based adders incur a slight accuracy loss while significantly improving latency and energy efficiency, highlighting their suitability for ML workloads.
Fields of Study & Subjects
Parallel Computing and Optimization Techniques
Ferroelectric and Negative Capacitance Devices
Advanced Memory and Neural Computing
Publication details
- Journal / source
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 16
- Issue
- 2
- Pages
- 312–326
- Publication date
- 2 March 2026