RL Algorithm-Based Optimization Design of 16-bit Σ Δ ADC for High-Precision Smart Sensor System

To capture the small signal of smart sensor system, the high-precision sigma delta analog to digital converter (ΣΔ ADC) is the essential components. Based on the reinforcement learning (RL) algorithm, a high-efficiency design method for 16-bit ΣΔ ADC is proposed in this research. The key circuit modules in the ΣΔ ADC are extracted to be separately optimized to decrease the design complexity. The prior knowledge of circuits can be introduced into the search process of RL algorithm to accelerate the search speed. In addition, the deep neural network (DNN) models are trained to replace the circuit simulator to reduce the cost of simulation resource. Two key circuits in the ΣΔ ADC are optimized. Compared with the advanced method, the proposed optimization method has the fastest convergency and best performance, which demonstrates the effectiveness of the proposed method. In addition, the simulation time can be decreased by 98.3 %, which can greatly speed up the optimization process. The optimized ΣΔ ADC is taped out. The test results show that the effective resolution is 16.16 bit, and the voltage noise is 8.7e-05 V. Compared with the original chip, the effective resolution can be improved by 6.3%, and the noise voltage can be decreased by 47%. Therefore, the proposed optimization design method for ΣΔ ADC can greatly decrease the design cycle and improve the performance of ΣΔ ADC, which presents the enormous potential application in the internet of things.