A Fully Synthesizable, Fine-Grained Distributed Digital-LDO Fabric Featuring Freely Linkable Current-Sharing Network for Scalable On-Chip Power Delivery

This article presents a fully synthesizable, fine-grained, distributed all-digital$6\times 6$LDO fabric in which modular micro-LDO regulator units are freely linkable—no centralized controller is required—enabling seamless scaling to arbitrarily large SoC power domains with minimal IR drop. The freely linkable current-sharing (FLCS) network exchanges only local digital output-current codes among adjacent LDOs, eliminating global routing bottlenecks and supporting various interconnection topologies (point-to-point, daisy-chain, tree, and hybrid) while ensuring balanced load sharing. This purely local interaction constrains peak IR drop across the 0.8-mm2power grid to below 4 mV at a 900-mA load. A$2\times 2$LDO cluster employing quadrature four-phase clocks generated by inverter-based buffers aids in accelerating transient responses. Fabricated in 28-nm CMOS, each micro-LDO, synthesized using primitive digital cells, occupies only$720~\mu $m2and delivers up to 25 mA, yielding a current density of 34.7 A/mm2. At an LDO-to-LDO grid resistance of 50 m$\Omega $, the 36-element LDO fabric exhibits current-sharing inaccuracy (CSI) of$\sigma \le 13$%—a$10\times $reduction over prior distributed LDO systems—while achieving 91.3% peak current efficiency at a dropout voltage of 50 mV. The plug-and-play nature of the FLCS network without a global supervisor makes this LDO fabric uniquely scalable and ideal for digital SoCs.