A Multiply-and-Accumulate SAR-ADC-Based Hybrid Slepian Beamformer
Abstract
This article introduces a hybrid Slepian beamforming receiver architecture with low power and area costs. Traditional large-scale true-time-delay (TTD) beamformers for wideband wireless communication suffer from high power consumption and high hardware costs. As an alternative, the Slepian beamforming approach reduces the number of analog-to-digital conversions (ADCs) and delays for TTD but retains the digital delay advantage of digital beamforming. The proposed architecture further improves energy efficiency by implementing charge-domain complex multiply and accumulate (MAC) inside successive approximation register (SAR) ADCs. The beamformer has eight intermediate frequency (IF) inputs, two simultaneous digital baseband outputs in phased mode, or one wideband output in TTD mode. The prototype is fabricated in 28-nm CMOS, consumes only 17 mW, and occupies 0.035 mm2. Measurements show error vector magnitudes (EVMs) better than −30 dB for quadrature amplitude modulation (QAM)-16 and QAM-256. In tests, beam squinting errors are not observed up to a steering angle of 60°.
Fields of Study & Subjects
Radio Frequency Integrated Circuit Design
Analog and Mixed-Signal Circuit Design
Advanced Power Amplifier Design
Publication details
- Journal / source
- IEEE Journal of Solid-State Circuits
- Volume
- 61
- Issue
- 5
- Pages
- 1895–1906
- Publication date
- 14 January 2026