AdaPIM: A CIM-Based General-Purpose Vision Accelerator With Adaptive Inter-Macro Parallelism and Multi-Level Feature Reuse

Recent advances in computer vision (CV) have introduced a variety of neural network (NN) architectures, including convolutional neural networks (CNNs), vision Transformers, and hybrid CNN-Transformer models. These models involve operators with widely varying computation and memory access patterns, demanding highly flexible and adaptive hardware for efficient execution. However, prior vision accelerators typically adopt fixed, one-size-fits-all designs, leading to inefficient hardware utilization under such diversity. In this work, we propose AdaPIM, an adaptive compute-in-memory (CIM) accelerator that dynamically reconfigures hardware resources to match the varying computation and memory characteristics of diverse CV workloads. AdaPIM incorporates: 1) a reconfigurable 4D-CIM processor that enables adaptive inter-macro parallelism along four architectural dimensions to improve spatial utilization under diverse computation patterns; 2) a flexible on-chip memory system that supports adaptive feature reuse at both register and global buffer levels to reduce on-/off-chip memory traffic under varying access patterns; and 3) a high-throughput vector core optimized for Softmax and layer normalization (LN) through algorithm-architecture co-design. Fabricated in 22nm, AdaPIM achieves chip-level energy efficiency of 22.7–63.9TOPS/W and system-level latency [including external memory access (EMA)] of 1.87–17.16 ms/frame with hardware utilization up to 83.12%, delivering improvements of 1.09–$13.96\times $in frame rate and 1.76–$3.41\times $in utilization, respectively, over state-of-the-art accelerators across diverse vision workloads.