A Noise-Reconfigurable TDM-Based Chopper-Stabilized ECG Amplifier With 142.8-GΩ Input Impedance
Abstract
This article presents the design of a noise-reconfigurable time-division multiplexed capacitively-coupled chopper analog front-end (AFE) with a novel impedance boosting loop (IBL) and a novel dc servo loop (DSL). The proposed IBL contains two IBLs for compensating leakage current due to parasitic capacitance from the ESD pad and external interconnections, and the chopper. By shifting the compensation node from the feedback pathway to the amplifier’s inputs, this work has realized a higher-resolution compensation, boosting the input impedance of the AFE to tens of G$\Omega $. The proposed DSL consists of a coarse DSL driven by dc supply voltages and a fine DSL driven by five-phase-interleaving pulsewidth modulated waveforms. A frequency-and-voltage-dependent monitoring technique eliminates electrode dc offset (EDO) while preserving low-frequency input impedance. Depending on the number of recording channels and electrocardiogram (ECG) signal amplitude, the ASIC can be reconfigured to 4, 2, or 1 channels, and the input-referred noise (IRN) is 0.40, 0.35, and$0.28~\mu $Vrms, respectively, while its tolerance to the EDO is 350 mV. Designed in a 0.18-$\mu $m CMOS process, the entire chip consumes$121.8~\mu $W, in which the AFE consumes$8.27~\mu $W per channel in a four-channel configuration and achieves an input impedance of 142.8 G$\Omega $at 1 Hz and 18.6 G$\Omega $at 50 Hz.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
ECG Monitoring and Analysis
Radio Frequency Integrated Circuit Design
Publication details
- Journal / source
- IEEE Journal of Solid-State Circuits
- Volume
- 61
- Issue
- 8
- Pages
- 4221–4237
- Publication date
- 27 January 2026