A High-Power Wideband Sub-THz Power Amplifier With Asymmetric Slotline-Based Series--Parallel Combiner in 130-nm SiGe BiCMOS Technology

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Authors: Gunwoo Park, Hyunjoon Kim, Sanggeun Jeon
Cited by: 0
References: 43

Abstract

This article presents a high-power, wideband sub-terahertz power amplifier (PA) implemented in a 130-nm SiGe BiCMOS technology. The PA features a novel asymmetric slotline-based series–parallel combiner (ASSPC) for output power combining. The ASSPC provides both low-loss, wideband combining and efficient admittance matching for four differential cascode PA unit cells, outperforming traditional transformer-based structures. Admittance balancers (Y-balancers) are incorporated into the ASSPC, ensuring that the optimum load-pull admittance is presented to each unit cell uniformly. The analysis and design guidelines for the ASSPC with Y-balancers are provided. The PA with the ASSPC achieves the highest saturated output power ($P_{\mathrm {sat}}$) of 15.7dBm at 235GHz and the widest 1-dB$P_{\mathrm {sat}}$bandwidth of 75GHz among Si-based PAs operating in the WR-3.4 band (220–330GHz). The peak gain is 19.8dB with a wide 3-dB bandwidth of 72.7GHz, spanning from 184.5 to 257.2GHz. The PA was also tested using various modulation schemes, including 16-quadrature amplitude modulation (QAM), 32-QAM, and 64-QAM. The measured rms error vector magnitudes (EVMs) are −18.1, −22.9, and −24.5dB for 16-QAM, 32-QAM, and 64-QAM signals, respectively, with corresponding average output powers ($P_{\mathrm {avg}}$) of 4.1, 4.8, and 3.3dBm at a carrier frequency of 242GHz.

Fields of Study & Subjects

Advanced Power Amplifier Design Radio Frequency Integrated Circuit Design Terahertz technology and applications

Publication details

Journal / source
IEEE Journal of Solid-State Circuits
Volume
61
Issue
8
Pages
3910–3925
Publication date
29 January 2026