A 6.78-MHz Single-Stage Regulating Rectifier With Dual Outputs Simultaneously Charged in a Half Cycle Achieving 92.2% Efficiency and 131 mW Output Power
Abstract
Targeting the wireless power transfer (WPT) to implantable medical devices (IMDs), this work presents a 6.78 MHz single-stage dual-output (SSDO) regulating rectifier. It can support the simultaneous charging of both outputs ($V_{\text {OUT1}}$and$V_{\text {OUT2}}$,$V_{\text {OUT1}} \gt V_{\text {OUT2}}$) in a half cycle, rather than in the conventional time-multiplexing manner, which can effectively boost the load power ($P_{\text {OUT}}$) and power conversion efficiency ($\eta _{\text {REC}}$). This rectifier was implemented using only three NMOS active diodes to minimize power loss that would otherwise be caused by PMOS. Furthermore, we proposed a charge distribution (CD) mode that can eliminate a large drop in voltage when$V_{\text {OUT2}}$is under a heavy load condition. The proposed SSDO rectifier was fabricated in a 180 nm CMOS process and occupied a chip area of 1.63 mm2. Measurement results verified two regulated outputs ($V_{\text {OUT1}} =3.3$V,$V_{\text {OUT2}}$ranges from 1.3 to 1.6 V) even under the strict case where$V_{\text {OUT1}}$and$V_{\text {OUT2}}$simultaneously transition from light to heavy conditions. Owing to the proposed simultaneous charging concept as well as the implementation topology, the rectifier supports a peak$P_{\text {OUT}}$of 131 mW and a peak$\eta _{\text {REC}}$of 92.2%. The performances achieved were competitive compared with prior SSDO rectifiers.
Fields of Study & Subjects
Multilevel Inverters and Converters
Advanced DC-DC Converters
Analog and Mixed-Signal Circuit Design
Publication details
- Journal / source
- IEEE Journal of Solid-State Circuits
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 61
- Issue
- 9
- Pages
- 4939–4950
- Publication date
- 16 April 2026