A Real-Time MPSoC-Based Back Projection Accelerator for High-Accuracy Large-Size SAR Imaging Using Truncated Sinc Reconstruction and Mixed Precision Design

The back projection (BP) algorithm has become an important method for achieving high-resolution Synthetic Aperture Radar (SAR) imaging due to its model-free assumptions, high imaging accuracy, and strong trajectory adaptability. However, its high computational complexity severely limits real-time performance and system scalability. To address the challenge of large-size, high-accuracy, real-time imaging on resource-constrained system-on-chip, this paper proposes an efficient BP acceleration architecture based on truncated sinc interpolation reconstruction that effectively eliminates the limitation of off-chip memory bandwidth on system performance, and significantly reduces on-chip memory (OCM) and logic resource consumption. A mixed precision strategy is proposed, reducing the Look-Up Table (LUT) consumption by 46.84% compared to the traditional floating-point implementation, while maintaining nearly the same imaging accuracy. The proposed system achieves real-time SAR imaging on both unmannedand mannedaerial vehicles: on a low-speed unmannedvehicle, it completes a$4096 \times 3840$image in 2.5968 s, and on a high-speed mannedvehicle, it completes an$8192 \times 4096$image in 15.3557 s, which meets real-time processing requirements. The Peak Signal-to-Noise Ratio (PSNR) of the imaging result improves nearly 7 times compared to most existing FPGA implementations with lower resource consumption, while achieving faster processing speeds. Experimental results demonstrate that the proposed scheme, by significantly improving resource utilization efficiency and imaging speed, achieves real-time processing capabilities for high-accuracy and large-size SAR imaging tasks, thereby exhibiting excellent practicality and scalability.