Demonstration of Near Ideal Short Channel Effect in L g = 25-nm Gate-All-Around Transistors Using Negative Capacitance Gate Stack
Abstract
We demonstrate integration of Negative Capacitance (NC) [1] gate stack with 18 Å thick HfO2-ZrO2multi-layers in a gate all around structure with channel diameters as small as 5 nm. The fabricated transistors show an overall equivalent oxide thickness (EOT) of 7Å which is 30% smaller compared to the reported results [2] with the most advanced HfO2gate stacks of the same thickness. The gate stack leads to excellent gate control – we demonstrate a subthreshold swing (SS) of 60mV/decade at room temperature and a DIBL of only 10mV/V for Leff=25 nm transistors with ON currents exceeding 1.5 mA/μm. Additionally, these transistors show improved SS at larger Vdsand, a negative DIBL – features that are unique to the NC phenomena and help alleviate the short-channel effects in a way that is not possible with conventional dielectrics.
Fields of Study & Subjects
Ferroelectric and Negative Capacitance Devices
Semiconductor materials and devices
Advanced Memory and Neural Computing
Publication details
- Journal / source
- IEEE Electron Device Letters
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 47
- Issue
- 3
- Pages
- 434–437
- Publication date
- 12 January 2026