A 300 krad(Si) TID Tolerant LVTSCR With nA Leakage and Stable ESD Window

This letter presents a Radiation-Hardened Low-Voltage Trigger Silicon-Controlled Rectifier (RHLVTSCR), which enhances the holding voltage, failure current, and total ionizing dose (TID) tolerance for electrostatic discharge (ESD) protection. The RHLVTSCR device is fabricated using a standard 0.18 μm bipolar-CMOS-DMOS (BCD) process. It features a gate-driven pMOSFET triggering structure that prevents parasitic sidewall electron leakage paths under TID irradiation. Meanwhile, the combination of surface n-p-n path modulation enhances both the device’s holding voltage and clamping speed. The Transmission Line Pulse (TLP) testing and γ-ray radiation experiments demonstrate that even with after of 300 krad (Si) TID irradiation, the RHLVTSCR maintains a failure current of 12.82 A, with the leakage current staying at the nA level, nearly an order of magnitude lower than that of traditional LVTSCR. The RHLVTSCR exhibits superior area efficiency, high TID tolerance, and stable ESD window, rendering it an excellent candidate for 5-V IC ESD protection in space applications.