Wafer-Level Heterogeneous Integration of GaN NMOS and CNT PMOS Transistors Using Direct-Immersion Technology

In this letter, we demonstrate wafer-level heterogeneous integration of GaN and carbon nanotube (CNT). The work reports the integration of GaN and CNT with minimal device performance degradation through a direct-immersion method, that is, the fabricated GaN devices were directly immersed in the sorted carbon nanotube solution. The integrated process features the extremely low temperature, with a maximum temperature below 180°C, and it does not require complex processes such as wafer bonding. The performance fluctuations of GaN HEMT and CNTFET were respectively less than 5% and 10% before and after integration. An inverter consisting of an E-mode GaN HEMT and CNTFET was fabricated on a GaN-on-Si substrate. The inverter exhibits an excellent gain of 50 V/V and low static power consumption of 134 nW at a supply voltage of 5 V. The implement of this process provides a feasible solution for the hetero-integration of GaN and CNT-based materials, and holds great potential in multi-functional integration circuits.