A Sub-20 mV V TH Hysteresis Enhancement-Mode GaN p -FET With PEALD AlON Gate Dielectric
Abstract
Large threshold voltage (VTH) hysteresis in GaNp-channel heterojunction field-effect transistors (p-FETs) significantly degrade device performance and limit its complementary circuit integration potential. This paper reduces theVTHhysteresis of enhancement-mode (E-mode) GaNp-FETs to 20 mV by employing a novel plasma-enhanced atomic layer deposition (PEALD)-grown AlON gate dielectric. Compared top-FET with Al2O3gate dielectric, a 15 nm PEALD AlON improved hysteresis from 4.1 V to sub-20 mV under dual-sweep dc-mode measurement. Furthermore, the fabricated E-modep-FETs with AlON and Al2O3gate dielectrics achieve ON-resistance (RON) of 670 Ω·mm and 1268 Ω·mm, and ON-state current (ION) of 8.2 mA/mm and 2.8 mA/mm, respectively. The novel AlON dielectric provides significant opportunities for developing GaN complementary circuit integration.
Fields of Study & Subjects
GaN-based semiconductor devices and materials
Ferroelectric and Negative Capacitance Devices
2D Materials and Applications
Publication details
- Journal / source
- IEEE Electron Device Letters
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 47
- Issue
- 4
- Pages
- 712–715
- Publication date
- 9 February 2026