A 0.66-pJ/b 42-Gb/s NRZ Receiver for Short-Reach Wireline Communications in 28-nm CMOS
Abstract
This letter presents an energy-efficient nonreturn-to-zero (NRZ) receiver for short-reach wireline applications. A charge-steering (CS)-based quarter-rate 1:4 demultiplexer with one-tap feedforward equalization (DeMUX-FFE) is proposed to achieve low power consumption. The effective gain of the CS latch with NRZ output is increased by an extended regeneration time, and intersymbol interference (ISI) caused by charge sharing is reduced through the proposed quarter-rate timing scheme. Fabricated in a 28-nm CMOS process, the prototype receiver achieves an energy efficiency of 0.66 pJ/b at a 42-Gb/s data rate, with a 0.3-unit-interval (UI) timing margin at a bit error rate (BER) of$1\times 10^{-12}$.
Fields of Study & Subjects
Advancements in PLL and VCO Technologies
Radio Frequency Integrated Circuit Design
Low-power high-performance VLSI design
Publication details
- Journal / source
- IEEE Microwave and Wireless Technology Letters
- Volume
- 36
- Issue
- 5
- Pages
- 777–780
- Publication date
- 15 January 2026