A Wide-Tuning-Range Type-I Subsampling PLL With Second Harmonic Extraction and Switch-Loop-Filter-Based SSPD
Abstract
This work introduces a type-I phase-locked loop (PLL) that combines a wide tuning range (TR) with low jitter is presented. It features: 1) a single-core voltage-controlled oscillator (VCO) with a concentric octagon layout that extracts both the fundamental and second harmonic, achieving a 110% TR without area penalty; and 2) a differential switch-loop filter (SLF) that serves as both an SSPD and loop filter (LF) to suppress the in-band phase noise (PN) from the VCO. The VCO exhibits an overlapping frequency range between the first harmonic (2.87–5.81 GHz) and second harmonic (5.74–10.99GHz) to ensure continuous coverage. Fabricated in 28-nm CMOS, the PLL measures a TR from 2.9 to 10 GHz with an rms jitter of 65.7fs (1 kHz to 100 MHz). With a 100-MHz reference, it achieves a figure of merit (FoM) of −251.4 to −248.6 dB and FoM tuning (FoM${}_{T}$) of −251.8 to −249.0 dB.
Fields of Study & Subjects
Advancements in PLL and VCO Technologies
Radio Frequency Integrated Circuit Design
Analog and Mixed-Signal Circuit Design
Publication details
- Journal / source
- IEEE Microwave and Wireless Technology Letters
- Volume
- 36
- Issue
- 5
- Pages
- 789–792
- Publication date
- 3 February 2026