On-Chip Charge-Trap-Transistor-Based Mismatch Calibration of an 8-Bit Thermometer Current-Source DAC
Abstract
This letter presents an on-chip mismatch calibration technique for current-source digital-to-analog converters (DACs) using charge-trap transistors (CTTs) in 22nm FDSOI technology. The proposed method exploits programmable threshold voltage (VTH) shifts in CTTs to locally tune the current of near-minimum-sized devices without external trimming. A compact 8-bit thermometer DAC is implemented to demonstrate the concept. The on-chip calibration loop iteratively measures and programs each CTT using short high-voltage pulses until the CTT current matches a reference, achieving device-level current uniformity. Measurement results show an 8x reduction in current-source mismatch and linearity improvements to 0.1/0.5 LSB DNL/INL. The proposed approach provides a scalable, low-cost, and nonvolatile solution for analog calibration in deeply scaled CMOS technologies.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
Advanced Electrical Measurement Techniques
Advanced DC-DC Converters
Publication details
- Journal / source
- IEEE Solid-State Circuits Letters
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 9
- Pages
- 53–56
- Publication date
- 1 January 2026