ASIC Tape-Out of the First Side-Channel-Protected Neural Network Design

This work presents the tape out of the first-ever side-channel protected machine learning (ML) classifier as an ASIC. Side-channel protection leverages hardware masking, algorithmic shuffling, and other countermeasures to mitigated power and electromagnetic leakage vulnerabilities in ML models. We fabricated the ASIC using the SkyWater 130nm technology node and a fully open-source design flow. We document our design and implementation process, detailing key decisions and the challenges encountered along the way, including but not limited to integrating the open-source physical design flow with Efabless’ ChipIgnite shuttle program. Our results indicate that open-source tools can be effectively used to produce secure and high-performance hardware, providing a valuable blueprint for future designs and advancing the field of secure ML hardware.