Resource-Efficient Deployment of Deep Learning Models for Semiconductor Defect Classification on Embedded Devices

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Authors: W. M. Lim, Marco Wagner, Cheng Yee Low, Uwe Gleiter
Cited by: 0
References: 18

Abstract

Powerful deep learning (DL) models for semiconductor defect classification are computationally infeasible for deployment on low-power edge devices. This research addresses this gap by analyzing the effects of pruning and post-training quantization on model accuracy, latency, and power consumption on a Raspberry Pi. Through multi-objective analysis, we found that 8-bit integer quantization proved highly effective, reducing inference latency by 41% (from 3.06 s to 1.79 s) and average power consumption by 50% (from 15.9 W to 7.6 W), while maintaining or slightly improving accuracy to 94.1%. The optimal deployment configuration, which combines 8-bit quantization with moderate pruning ($40 \%-60 {\%}$sparsity), reduces energy per inference by approx. 3.5 times and decreases model size from 90 MB to 25 MB. These findings validate that production-grade accuracy can be maintained, enabling practical, on-device defect detection under stringent edge computing budgets.

Fields of Study & Subjects

Advanced Neural Network Applications IoT and Edge/Fog Computing Industrial Vision Systems and Defect Detection

Publication details

Journal / source
IEEE Mediterranean Electrotechnical Conference (MELECON)
Pages
1–6
Publication date
2 February 2026
Language
EN