Deadlock-Free Routing for Full-Mesh Networks Without Using Virtual Channels

High-radix, low-diameter networks like HyperX and Dragonfly rely on Full-mesh switch cliques and require multiple virtual channels (VCs) to avoid packet deadlocks in adaptive routing. However, VCs introduce significant overhead in terms of area, power, and design complexity, limiting switch scalability. This paper presents TERA (Topology-Embedded Routing Algorithm), a novel proposal that employs an embedded physical subnetwork to provide deadlock-free non-minimal paths without using VCs. In a Full-mesh network, compared to state of the art VC-based approaches, TERA eliminates VCs while maintaining similar latency and throughput. Moreover, TERA can be applied to networks based on Full-mesh such as Dragonfly, Dragonfly+, and HyperX.