Dataflow-Reconfigurable CNN Accelerator Design

Dataflow-level reconfigurability plays a crucial role in Convolutional Neural Network (CNN) acceleration by enabling the selection of the most suitable dataflow pattern for convolution operations. Fully reconfigurable architectures support multiple dataflows and provide high flexibility, but often incur increased design complexity and operational overhead. In contrast, non-reconfigurable architectures optimized for a single dataflow achieve high efficiency for specific workloads but lack adaptability. This paper presents an intermediate dataflow-level reconfigurable CNN accelerator that balances flexibility and efficiency by supporting a limited set of key dataflow patterns. The proposed accelerator identifies the most appropriate dataflow with an average of 0.15% excess latency. Using a specialized systolic array architecture, the design achieves an average of 35% performance improvement compared to non-reconfigurable, single-dataflow architectures.