Current Clamping in Common-Base Topologies for Enhanced Output Power and Efficiency in E- and D-Band SiGe BiCMOS Technology: Pushing performance through circuit simplicity
Abstract
The increasing demand for high-capacity wireless links in the E and D bands has intensified the need for power-efficient and high-linearity transmitter front ends. This article investigates the design and implementation of SiGe BiCMOS PAs and frequency upconverters that employ common-base (CB) topologies, current clamping, and stacked architectures to enhance output power and efficiency at mmW and subterahertz (THz) frequencies. CB stages are shown to improve voltage swing, thermal stability, and linearity compared to conventional common-emitter (CE) designs, while current clamping dynamically adjusts the supply current to the input signal envelope, reducing back-off power consumption. Stacked CB architectures enable uniform voltage distribution across multiple transistors, mitigating parasitic limitations and further increasing output power. The proposed techniques are validated through E- and D-band designs, including a 135-GHz stacked CB amplifier achieving 19.7-dBm saturated power (Psat) with 12.1% PAE, and a 140-GHz switching-quad upconverter delivering 6.3 dBm with envelope-tracked current clamping. These results demonstrate an efficient approach for next-generation sub-THz transmitters.
Fields of Study & Subjects
Advanced Power Amplifier Design
Radio Frequency Integrated Circuit Design
Analog and Mixed-Signal Circuit Design
Publication details
- Journal / source
- IEEE Solid-State Circuits Magazine
- Volume
- 18
- Issue
- 1
- Pages
- 51–59
- Publication date
- 1 January 2026